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dc.contributor.author Vásquez-Ortiz, Víctor Eduardo
dc.contributor.author Milla, Marco
dc.contributor.author Verástegui, Joaquín
dc.contributor.author Romero, Oscar
dc.date.accessioned 2021-02-16T11:31:53Z
dc.date.available 2021-02-16T11:31:53Z
dc.date.issued 2019-11
dc.identifier.citation Vásquez-Ortiz, V. E., Milla, M., Verástegui, J., & Romero, O. (2019). FPGA-based GPS controlled timing system with nanosecond accuracy and leap second support. In==$IEEE Fourth Ecuador Technical Chapters Meeting (ETCM).$==https://doi.org/10.1109/ETCM48019.2019.9014892 es_ES
dc.identifier.govdoc index-oti2018
dc.identifier.uri http://hdl.handle.net/20.500.12816/4916
dc.description.abstract This paper presents the design and implementation of the GCTS (GPS Controlled Timing System), a hardware module that addresses the high precision acquisition timing necessity of the Jicamarca Radio Observatory (JRO). It extracts UTC information from a Trimble GPS receiver. With this information it creates a clock with a precision based on the reference signal from the GPS receiver, making it possible to time an external excitation signal (e.g. the radar transmission pulse) assigning it a sub-microsecond timestamp. This timestamp is stored in a register map along with other configuration and operation registers that are accessed by a SPI interface. Through this map the user is able to customize the response of the system to leap seconds (typical of the UTC scale). Tests made together with JRO's acquisition equipment validated the reliability and portability of the system on different platforms. The GCTS was developed on an FPGA device using VHDL under a structural design that enabled a modular organization of the almost twenty components comprised in the system. With two identical systems running at 60MHz on different boards, a 50ns accuracy and a SPI transfer rate as high as 15MHz were achieved. Even though the system was intended for radar applications, it can be used to mark any type of signal. es_ES
dc.format application/pdf es_ES
dc.language.iso eng es_ES
dc.publisher Institute of Electrical and Electronics Engineers es_ES
dc.relation.ispartof urn:isbn:978-1-7281-3764-3
dc.rights info:eu-repo/semantics/closedAccess es_ES
dc.subject Timing es_ES
dc.subject Timestamp es_ES
dc.subject Synchronization es_ES
dc.subject Nanosecond accuracy es_ES
dc.subject GPS es_ES
dc.subject FPGA es_ES
dc.title FPGA-based GPS controlled timing system with nanosecond accuracy and leap second support es_ES
dc.type info:eu-repo/semantics/conferenceObject es_ES
dc.subject.ocde http://purl.org/pe-repo/ocde/ford#1.05.01 es_ES
dc.description.peer-review Por pares es_ES
dc.identifier.doi https://doi.org/10.1109/ETCM48019.2019.9014892 es_ES

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