Browsing by Author "Verástegui, Joaquín"
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Item Restricted Design and implementation of a high speed interface system over Gigabit Ethernet based on FPGA for use on radar acquisition systems(Institute of Electrical and Electronics Engineers, 2018-01) Rojas, John; Verástegui, Joaquín; Milla, MarcoThe Jicamarca Radio Observatory (JRO) is part of the Western Hemisphere chain of Incoherent Scatter Radar (ISR) observatories which extends from Lima, Peru to S0ndre Str0mfjord, Greenland. The equatorial ionosphere is studied only by JRO in the world. The Observatory is a facility of the Instituto Geofísico del PerU operated with support from the US National Science Foundation Cooperative Agreements through Cornell University. One of the main radar components is JARS (Jicamarca Acquisition Radar System), which functionality is based on CPLDs (Complex Programmable Logic Device) to configure the system and transfer the data from the digital receivers to the acquisition computer over a proprietary interface NI PCIe-6537. However due to some limitations as its high cost, driver updates dependency and the data transfer speed, it was necessary to replace this interface with the design and implementation of a high-speed hardware, embedded on FPGA devices, to transmit the data through the LVDS interface to a double buffering stage, and forward these as packets on the standard Gigabit Ethernet, based on the IEEE 802.3 protocol and using the UDP protocol. In this way, this development will allow to update the hardware of the current JARS to get a low cost portable system and to work with the required bandwidth. A prototype of this system was developed on the JRO and also a customized software was written, based on UDP socket and multiple threads of execution.Item Restricted Digital receiver modernization using FPGA and JESD204B interface for SDR applications(IEEE, Institute of Electrical and Electronics Engineers, 2023) Verástegui, Joaquín; Rojas, John; Tupac, Isaac; Gonzales, LuisThe latest data acquisition system running at the Jicamarca Radio Observatory (JRO) for the main radar has been used for more than seven years now. Although there are no major inconveniences on the performance, there have been some problems with internal interference which are related to the PCB design that uses old discrete components. A new design is proposed for the digital receivers, giving it more lifetime and flexibility for future modifications. The JESD204B protocol is ideal for radar applications, a JESD204B ADC together with an FPGA was proposed for the new design, making it capable of a wider bandwidth which could adapt the system to an SDR device in the future with the proper software. This paper will present the new PCB design, the IP cores implemented for the FPGA and some preliminary tests with development boards.Item Restricted FPGA-based GPS controlled timing system with nanosecond accuracy and leap second support(Institute of Electrical and Electronics Engineers, 2019-11) Vásquez-Ortiz, Víctor Eduardo; Milla, Marco; Verástegui, Joaquín; Romero, OscarThis paper presents the design and implementation of the GCTS (GPS Controlled Timing System), a hardware module that addresses the high precision acquisition timing necessity of the Jicamarca Radio Observatory (JRO). It extracts UTC information from a Trimble GPS receiver. With this information it creates a clock with a precision based on the reference signal from the GPS receiver, making it possible to time an external excitation signal (e.g. the radar transmission pulse) assigning it a sub-microsecond timestamp. This timestamp is stored in a register map along with other configuration and operation registers that are accessed by a SPI interface. Through this map the user is able to customize the response of the system to leap seconds (typical of the UTC scale). Tests made together with JRO's acquisition equipment validated the reliability and portability of the system on different platforms. The GCTS was developed on an FPGA device using VHDL under a structural design that enabled a modular organization of the almost twenty components comprised in the system. With two identical systems running at 60MHz on different boards, a 50ns accuracy and a SPI transfer rate as high as 15MHz were achieved. Even though the system was intended for radar applications, it can be used to mark any type of signal.Item Open Access Initial design of a GNU radio interface for the new version of the Jicamarca Acquisition Radar System (JARS 2.0)(Instituto Geofísico del Perú, 2020-06) Tupac, Isaac; Rojas, John; Verástegui, Joaquín; Espinoza, Juan Carlos; Milla, MarcoIn this poster the initial design of a new software interface to control the novel ethernet based radar acquisition system JARS 2.0 of the Jicamarca Radio Observatory is presented. This interface will be implemented using the open-source software development toolkit GNU Radio; which besides controlling the JARS 2.0, it will obtain the acquired data for its further processing. The aim of the project, although in its development stage, will be to use the benefits of the GNU Radio to process, plot and even save the data in an standard way.Item Restricted SOPHy: Scanning-system for Observations of Peruvian Hydrometeorological-events(IEEE, Institute of Electrical and Electronics Engineers, 2021) Espinoza, Juan C.; Scipión, Danny; Valdez, Alexander; Verástegui, JoaquínIn this paper we present the current progress in the construction of the first X-band dual-pol mobile weather radar (SOPHy) in Peru. This portable mobile system allows scans in azimuth and elevation with a maximum range of 60 km. The radar transmission and reception systems are based on SDR (Software Defined Radio) technologies for configuration flexibility. The objective of the radar is to study precipitation in an area of several tens of kilometers around the radar, in order to research the climate and atmospheric conditions in Peru.